LTC2862I [Linear Systems]
±60V Fault Protected 3V to 5.5V RS485/RS422 Transceivers; ± 60V故障保护的3V至5.5V>RS485 / RS422收发器型号: | LTC2862I |
厂家: | Linear Systems |
描述: | ±60V Fault Protected 3V to 5.5V
RS485/RS422 Transceivers |
文件: | 总24页 (文件大小:247K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LTC2862/LTC2863/
LTC2864/LTC2865
6ꢀ0V FaulVꢁPrlteltꢂV30VlrV5ꢃ50
RS485/RS422VTPFnsetivtPs
FEATURES
DESCRIPTION
Protected from Overvoltage Line Faults to ±±6V
TheLTC®2862/LTC2863/LTC2864/LTC2865arelowpower,
20Mbpsor250kbpsRS485/RS422transceiversoperating
on 3V to 5.5V supplies that feature 60V overvoltage fault
protectiononthedatatransmissionlinesduringallmodes
of operation, including power-down. Low EMI slew rate
limited data transmission is available in a logic-selectable
250kbpsmodeintheLTC2865andin250kbpsversionsof
the LTC2862-LTC2864. Enhanced ESD protection allows
these parts to withstand 15kV HBM on the transceiver
interface pins without latchup or damage.
n
n
3V to 5.5V Supply Voltage
n
26Mbps or Low EMI 256kbps Data Rate
n
±ꢀ5kV ESD Interface Pinsꢁ ±8kV ꢂll Other Pins
n
Extended Common Mode Range: ±25V
n
Guaranteed Failsafe Receiver Operation
n
High Input Impedance Supports 256 Nodes
n
1.65V to 5.5V Logic Supply Pin (V ) for Flexible
L
Digital Interface (LTC2865)
n
n
H-Grade Option Available (–40°C to 125°C)
Fully Balanced Differential Receiver Thresholds for
Low Duty Cycle Distortion
Extended 25V input common mode range and full fail-
safe operation improve data communication reliability in
electrically noisy environments and in the presence of
large ground loop voltages.
n
n
n
Current Limited Drivers and Thermal Shutdown
Pin Compatible with LT1785 and LT1791
Available in DFN and Leaded Packages
PRODUCT SELECTION GUIDE
APPLICATIONS
PꢂRT
MꢂX DꢂTꢂ
RꢂTE (bps)
NUMBER
DUPLEX
HALF
HALF
FULL
FULL
FULL
FULL
FULL
ENꢂBLES
YES
V PIN
L
n
Supervisory Control and Data Acquisition (SCADA)
LTC2862-1
LTC2862-2
LTC2863-1
LTC2863-2
LTC2864-1
LTC2864-2
LTC2865
20M
250k
NO
NO
NO
NO
NO
NO
YES
n
Industrial Control and Instrumentation Networks
YES
n
Automotive and Transportation Electronics
NO
20M
n
Building Automation, Security Systems and HVAC
Medical Equipment
Lighting and Sound System Control
NO
250k
n
YES
20M
n
YES
250k
L, LT, LTC, LTM, Linear Technology the Linear logo and μModule are registered trademarks of
Linear Technology Corporation. All other trademarks are the property of their respective owners.
YES
20M/250k
LTC28±5 Receiving ꢀ6Mbps ±266mV Differential
Signal with ꢀMHz ±25V Common Mode Sweep
TYPICAL APPLICATION
RS485 Link With Large Ground Loop Voltage
A,B
LTC2862
LTC2862
A,B
50V/DIV
VCC1
VCC2
RO1
RE1
DE1
R
R
RO2
RE2
DE2
A-B
A-B
0.5V/DIV
R
R
t
t
DI1
D
D
DI2
RO
RO
V GROUND LOOP
≤25V
5V/DIV
2862345 TA01a
GND1
GND2
2862345 TA01b
100ns/DIV
2862345f
1
LTC2862/LTC2863/
LTC2864/LTC2865
ABSOLUTE MAXIMUM RATINGS
(Note ꢀ)
Supply Voltages
Receiver Output (RO)
V ..............................................................–0.3 to 6V
(LTC2865) ..................................–0.3V to (V + 0.3V)
CC
L
V ................................................................–0.3 to 6V
L
Operating Ambient Temperature Range (Note 4)
Logic Input Voltages (RE, DE, DI, SLO) ..........–0.3 to 6V
Interface I/O: A, B, Y, Z.............................. –60V to +60V
Receiver Output (RO)
LTC286xC................................................. 0°C to 70°C
LTC286xI.............................................. –40°C to 85°C
LTC286xH .......................................... –40°C to 125°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec) .................. 300°C
(LTC2862-LTC2864)....................–0.3V to (V +0.3V)
CC
PIN CONFIGURATION
LTC2862-1, LTC2862-2
LTC2862-1, LTC2862-2
TOP VIEW
TOP VIEW
RO
RE
DE
DI
1
2
3
4
8
7
6
5
V
B
A
CC
RO
RE
DE
DI
1
2
3
4
8
7
6
5
V
B
A
CC
9
GND
GND
S8 PACKAGE
8-LEAD (150mil) PLASTIC SO
DD PACKAGE
T
= 150°C, θ = 150°C/W, θ = 39°C/W
JMAX
JA
JC
8-LEAD (3mm × 3mm) PLASTIC DFN
EXPOSED PAD (PIN 9) CONNECT TO PCB GND
T
= 150°C, θ = 43°C/W, θ = 3°C/W
JMAX
JA
JC
LTC2863-1, LTC2863-2
LTC2863-1, LTC2863-2
TOP VIEW
TOP VIEW
V
1
2
3
4
8
A
B
Z
Y
CC
V
1
2
3
4
8
7
6
5
A
B
Z
Y
CC
RO
DI
7
6
5
RO
DI
9
GND
GND
S8 PACKAGE
8-LEAD (150mil) PLASTIC SO
DD PACKAGE
T
= 150°C, θ = 150°C/W, θ = 39°C/W
JMAX
JA
JC
8-LEAD (3mm × 3mm) PLASTIC DFN
EXPOSED PAD (PIN 9) CONNECT TO PCB GND
T
= 150°C, θ = 43°C/W, θ = 3°C/W
JMAX
JA
JC
LTC2864-1, LTC2864-2
LTC2864-1, LTC2864-2
TOP VIEW
TOP VIEW
NC
1
2
3
4
5
6
7
14
V
CC
RO
1
2
3
4
5
10
V
A
B
Z
Y
CC
RO
RE
13
12
11
10
9
NC
A
RE
DE
9
8
7
6
11
DI
DE
B
GND
DI
Z
GND
GND
Y
DD PACKAGE
10-LEAD (3mm × 3mm) PLASTIC DFN
8
NC
EXPOSED PAD (PIN 11) CONNECT TO PCB GND
T
= 150°C, θ = 43°C/W, θ = 3°C/W
JMAX
JA JC
S PACKAGE
14-LEAD (150mil) PLASTIC SO
T
= 150°C, θ = 88°C/W, θ = 37°C/W
JMAX
JA JC
2862345f
2
LTC2862/LTC2863/
LTC2864/LTC2865
PIN CONFIGURATION
LTC2865
LTC2865
TOP VIEW
TOP VIEW
1
2
3
4
5
6
RO
RE
DE
DI
12
11
10
9
8
7
V
A
B
Z
Y
CC
RO
RE
DE
DI
1
2
3
4
5
6
12
11
10
9
V
A
B
Z
Y
CC
13
V
13
L
GND
SLO
V
8
L
MSE PACKAGE
12-LEAD PLASTIC MSOP
EXPOSED PAD (PIN 13) CONNECT TO PCB GND
= 150°C, θ = 40°C/W, θ = 10°C/W
GND
7
SLO
T
JMAX
JA
JC
DE PACKAGE
12-LEAD (4mm × 3mm) PLASTIC DFN
EXPOSED PAD (PIN 13) CONNECT TO PCB GND
T
= 150°C, θ = 43°C/W, θ = 4.3°C/W
JMAX
JA JC
ORDER INFORMATION
LEꢂD FREE FINISH
LTC2862CS8-1#PBF
LTC2862IS8-1#PBF
LTC2862HS8-1#PBF
LTC2862CS8-2#PBF
LTC2862IS8-2#PBF
LTC2862HS8-2#PBF
LTC2862CDD-1#PBF
LTC2862IDD-1#PBF
LTC2862HDD-1#PBF
LTC2862CDD-2#PBF
LTC2862IDD-2#PBF
LTC2862HDD-2#PBF
LTC2863CS8-1#PBF
LTC2863IS8-1#PBF
LTC2863HS8-1#PBF
LTC2863CS8-2#PBF
LTC2863IS8-2#PBF
LTC2863HS8-2#PBF
LTC2863CDD-1#PBF
LTC2863IDD-1#PBF
LTC2863HDD-1#PBF
LTC2863CDD-2#PBF
LTC2863IDD-2#PBF
LTC2863HDD-2#PBF
TꢂPE ꢂND REEL
PꢂRT MꢂRKING*
28621
28621
28621
28622
28622
28622
LFXK
PꢂCKꢂGE DESCRIPTION
8-Lead (150mil) Plastic SO
8-Lead (150mil) Plastic SO
8-Lead (150mil) Plastic SO
8-Lead (150mil) Plastic SO
8-Lead (150mil) Plastic SO
8-Lead (150mil) Plastic SO
TEMPERꢂTURE RꢂNGE
0°C to 70°C
LTC2862CS8-1#TRPBF
LTC2862IS8-1#TRPBF
LTC2862HS8-1#TRPBF
LTC2862CS8-2#TRPBF
LTC2862IS8-2#TRPBF
LTC2862HS8-2#TRPBF
LTC2862CDD-1#TRPBF
LTC2862IDD-1#TRPBF
LTC2862HDD-1#TRPBF
LTC2862CDD-2#TRPBF
LTC2862IDD-2#TRPBF
LTC2862HDD-2#TRPBF
LTC2863CS8-1#TRPBF
LTC2863IS8-1#TRPBF
LTC2863HS8-1#TRPBF
LTC2863CS8-2#TRPBF
LTC2863IS8-2#TRPBF
LTC2863HS8-2#TRPBF
LTC2863CDD-1#TRPBF
LTC2863IDD-1#TRPBF
LTC2863HDD-1#TRPBF
LTC2863CDD-2#TRPBF
LTC2863IDD-2#TRPBF
LTC2863HDD-2#TRPBF
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
8-Lead (3mm × 3mm) Plastic DFN
8-Lead (3mm × 3mm) Plastic DFN
8-Lead (3mm × 3mm) Plastic DFN
8-Lead (3mm × 3mm) Plastic DFN
8-Lead (3mm × 3mm) Plastic DFN
8-Lead (3mm × 3mm) Plastic DFN
8-Lead (150mil) Plastic SO
LFXK
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
LFXK
LFXM
LFXM
LFXM
28631
28631
28631
28632
28632
28632
LFXN
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
8-Lead (150mil) Plastic SO
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
8-Lead (150mil) Plastic SO
8-Lead (150mil) Plastic SO
8-Lead (150mil) Plastic SO
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
8-Lead (150mil) Plastic SO
8-Lead (3mm × 3mm) Plastic DFN
8-Lead (3mm × 3mm) Plastic DFN
8-Lead (3mm × 3mm) Plastic DFN
8-Lead (3mm × 3mm) Plastic DFN
8-Lead (3mm × 3mm) Plastic DFN
8-Lead (3mm × 3mm) Plastic DFN
LFXN
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
LFXN
LFXP
LFXP
–40°C to 85°C
–40°C to 125°C
LFXP
2862345f
3
LTC2862/LTC2863/
LTC2864/LTC2865
ORDER INFORMATION
LEꢂD FREE FINISH
LTC2864CS-1#PBF
LTC2864IS-1#PBF
LTC2864HS-1#PBF
LTC2864CS-2#PBF
LTC2864IS-2#PBF
LTC2864HS-2#PBF
LTC2864CDD-1#PBF
LTC2864IDD-1#PBF
LTC2864HDD-1#PBF
LTC2864CDD-2#PBF
LTC2864IDD-2#PBF
LTC2864HDD-2#PBF
LTC2865CMSE#PBF
LTC2865IMSE#PBF
LTC2865HMSE#PBF
LTC2865CDE#PBF
LTC2865IDE#PBF
TꢂPE ꢂND REEL
PꢂRT MꢂRKING*
LTC2864S-1
LTC2864S-1
LTC2864S-1
LTC2864S-2
LTC2864S-2
LTC2864S-2
LFXQ
PꢂCKꢂGE DESCRIPTION
TEMPERꢂTURE RꢂNGE
0°C to 70°C
LTC2864CS-1#TRPBF
LTC2864IS-1#TRPBF
LTC2864HS-1#TRPBF
LTC2864CS-2#TRPBF
LTC2864IS-2#TRPBF
LTC2864HS-2#TRPBF
LTC2864CDD-1#TRPBF
LTC2864IDD-1#TRPBF
LTC2864HDD-1#TRPBF
LTC2864CDD-2#TRPBF
LTC2864IDD-2#TRPBF
LTC2864HDD-2#TRPBF
LTC2865CMSE#TRPBF
LTC2865IMSE#TRPBF
LTC2865HMSE#TRPBF
LTC2865CDE#TRPBF
LTC2865IDE#TRPBF
LTC2865HDE#TRPBF
14-Lead (150mil) Plastic SO
14-Lead (150mil) Plastic SO
14-Lead (150mil) Plastic SO
14-Lead (150mil) Plastic SO
14-Lead (150mil) Plastic SO
14-Lead (150mil) Plastic SO
10-Lead (3mm × 3mm) Plastic DFN
10-Lead (3mm × 3mm) Plastic DFN
10-Lead (3mm × 3mm) Plastic DFN
10-Lead (3mm × 3mm) Plastic DFN
10-Lead (3mm × 3mm) Plastic DFN
10-Lead (3mm × 3mm) Plastic DFN
12-Lead Plastic MSOP
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
LFXQ
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
LFXQ
LFXR
LFXR
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
LFXR
2865
2865
12-Lead Plastic MSOP
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
2865
12-Lead Plastic MSOP
LTXM
12-Lead (4mm × 3mm) Plastic DFN
12-Lead (4mm × 3mm) Plastic DFN
12-Lead (4mm × 3mm) Plastic DFN
LTXM
–40°C to 85°C
–40°C to 125°C
LTC2865HDE#PBF
LTXM
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature rangeꢁ otherwise specifications are at Tꢂ = 25°C. VCC = VL = 3.3V unless otherwise noted. (Note 2)
SYMBOL
Supplies
PꢂRꢂMETER
CONDITIONS
MIN
TYP
MꢂX
UNITS
l
l
l
V
V
Primary Power Supply
3
5.5
V
V
CC
L
Logic Interface Power Supply
LTC2865 Only
1.65
V
CC
I
Supply Current in Shutdown Mode
(C-, I-Grade) (N/A LTC2863)
DE = 0V, RE = V = V
0
0
5
μA
CCS
CC
L
L
l
l
Supply Current in Shutdown Mode
(H-Grade) (N/A LTC2863)
DE = 0V, RE = V = V
15
μA
μA
CC
I
I
Supply Current with Both Driver and
Receiver Enabled (LTC2862-1, LTC2863-1,
LTC2864-1, LTC2865 with SLO High)
No Load, DE = V = V , RE = 0V
900
1300
CCTR
CC
L
l
Supply Current with Both Driver and
Receiver Enabled (LTC2862-2, LTC2863-2,
LTC2864-2, LTC2865 with SLO Low)
No Load, DE = V = V , RE = 0V
3.3
8
mA
CCTRS
CC
L
2862345f
4
LTC2862/LTC2863/
LTC2864/LTC2865
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature rangeꢁ otherwise specifications are at Tꢂ = 25°C. VCC = VL = 3.3V unless otherwise noted. (Note 2)
SYMBOL
Driver
PꢂRꢂMETER
CONDITIONS
MIN
TYP
MꢂX
UNITS
l
l
l
l
|V
|
Differential Driver Output Voltage
R = ∞ (Figure 1)
1.5
1.5
2
V
V
V
V
V
OD
CC
R = 27Ω (Figure 1)
R = 50Ω (Figure 1)
5
V
CC
Δ|V
|
Change in Magnitude of Driver Differential R = 27Ω or 50Ω (Figure 1)
Output Voltage
0.2
OD
l
l
V
Driver Common-Mode Output Voltage
R = 27Ω or 50Ω (Figure 1)
R = 27Ω or 50Ω (Figure 1)
3
V
V
OC
Δ|V
|
Change in Magnitude of Driver
Common-Mode Output Voltage
0.2
OC
l
l
I
I
Maximum Driver Short-Circuit Current
–60V ≤ (Y or Z) ≤ 60V (Figure 2)
150
250
30
mA
μA
OSD
OZD
Driver Three-State (High Impedance)
Output Current on Y and Z
DE = 0V, V = 0V or 3.3V, V = –25V, 25V
CC O
Receiver
l
l
l
l
I
Receiver Input Current (A,B)
V
CC
V
CC
V
CC
V
CC
= 0V or 3.3V, V = 12V (Figure 3)
125
143
μA
μA
μA
μA
IN
IN
(C-, I-Grade LTC2863, LTC2864, LTC2865)
= 0V or 3.3V, V = –7V (Figure 3)
–100
–100
IN
Receiver Input Current (A,B)
(H-Grade LTC2863, LTC2864, LTC2865;
C-, I-, H-Grade LTC2862)
= 0V or 3.3V, V = 12V (Figure 3)
IN
= 0V or 3.3V, V = –7V (Figure 3)
IN
R
Receiver Input Resistance
0 ≤ V ≤ 5.5V, V = –25V or 25V
112
kΩ
V
IN
CC
IN
(Figure 3)
l
l
V
V
Receiver Common Mode Input Voltage
(A + B)/2
–25
25
CM
TH
Differential Input Signal Threshold
Voltage (A – B)
–25V ≤ V ≤ 25V
200
mV
CM
ΔV
Differential Input Signal Hysteresis
V
= 0V
150
–50
25
mV
mV
mV
V
TH
CM
l
Differential Input Failsafe Threshold Voltage –25V ≤ V ≤ 25V
–200
0
CM
Differential Input Failsafe Hysteresis
Receiver Output High Voltage
V
CM
= 0V
V
V
I(RO) = –3mA (Sourcing)
l
l
l
V
–0.4V
CC
OH
V ≥ 2.25V, I(RO) = –3mA (LTC2865)
V –0.4V
L
L
V < 2.25V, I(RO) = –2mA (LTC2865)
V –0.4V
L
L
l
l
Receiver Output Low Voltage
I(RO) = 3mA (Sinking)
0.4
5
V
OL
I
Receiver Three-State (High Impedance)
Output Current on RO
RE = High, RO = 0V or V
RO = 0V or V (LTC2865)
μA
OZR
CC
L
l
I
Receiver Short-Circuit Current
RE = Low, RO = 0V or V
20
mA
OSR
CC
RO = 0V or V (LTC2865)
L
Logic
(LTC28±2ꢁ LTC28±3ꢁ LTC28±4)
Input Threshold Voltage (DE, DI, RE)
Logic Input Current (DE, DI, RE)
(LTC28±5)
l
l
V
TH
3.0 ≤ V ≤ 5.5V
0.33 • V
0.67 • V
5
V
CC
CC
CC
I
0 ≤ V ≤ V
CC
0
0
μA
INL
IN
Logic
l
l
V
TH
Input Threshold Voltage (DE, DI, RE, SLO) 1.65V ≤ V ≤ 5.5V
0.33 • V
0.67 • V
5
V
L
L
L
I
Logic Input Current (DE, DI, RE, SLO)
0 ≤ V ≤ V
L
μA
INL
IN
2862345f
5
LTC2862/LTC2863/
LTC2864/LTC2865
SWITCHING CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature rangeꢁ otherwise specifications are at Tꢂ = 25°C. VCC = VL = 3.3V unless otherwise noted. (Note 2)
SYMBOL
PꢂRꢂMETER
CONDITIONS
MIN
TYP
MꢂX
UNITS
Driver – High Speed (LTC28±2-ꢀꢁ LTC28±3-ꢀꢁ LTC28±4-ꢀꢁ LTC28±5 with SLO High)
l
l
l
f
t
Maximum Data Rate
(Note 3)
20
Mbps
ns
MAX
, t
Driver Input to Output
R
DIFF
DIFF
= 54Ω, C = 100pF (Figure 4)
25
2
50
9
PLHD PHLD
L
Δt
Driver Input to Output Difference
R
= 54Ω, C = 100pF (Figure 4)
ns
PD
L
|t
– t
|
PHLD
PLHD
l
l
l
t
t
Driver Output Y to Output Z
Driver Rise or Fall Time
R
R
= 54Ω, C = 100pF (Figure 4)
10
15
ns
ns
ns
SKEWD
DIFF
L
, t
RD FD
= 54Ω, C = 100pF (Figure 4)
4
DIFF
L
t
t
, t
, t
,
Driver Enable or Disable Time
R = 500Ω, C = 50pF, RE = 0V
180
ZLD ZHD
LZD HZD
L
L
(Figure 5)
l
l
t
, t
Driver Enable from Shutdown
Time to Shutdown
R =500Ω, C = 50pF, RE = High
9
μs
ns
ZHSD ZLSD
SHDND
L
L
(Figure 5)
t
R = 500Ω, C = 50pF, RE = High
180
L
L
(Figure 5)
Driver – Slew Rate Limited ( LTC28±2-2ꢁ LTC28±3-2ꢁ LTC28±4-2ꢁ LTC28±5 with SLO Low)
l
l
l
f
t
Maximum Data Rate
(Note 3)
250
500
kbps
ns
MAX
, t
Driver Input to Output
R
DIFF
R
DIFF
= 54Ω, C = 100pF (Figure 4)
850
50
1500
500
PLHD PHLD
L
Δt
Driver Input to Output Difference
= 54Ω, C = 100pF (Figure 4)
ns
PD
L
|t
PLHD
– t
|
PHLD
l
l
l
t
t
t
Driver Output Y to Output Z
Driver Rise or Fall Time
Driver Enable Time
R
R
= 54Ω, C = 100pF (Figure 4)
500
1200
1200
ns
ns
ns
SKEWD
DIFF
L
, t
= 54Ω, C =100pF (Figure 4)
800
RD FD
DIFF
L
, t
R = 500Ω, C = 50pF, RE = 0V
ZLD ZHD
L
L
(Figure 5)
l
l
l
t
t
t
, t
Driver Disable Time
R = 500Ω, C = 50pF, RE = 0V
180
10
ns
μs
ns
LZD HZD
L
L
(Figure 5)
, t
Driver Enable from Shutdown
Time to Shutdown
R = 500Ω, C = 50pF, RE = High
ZHSD ZLSD
L
L
(Figure 5)
R =500Ω, C = 50pF, RE = High
180
SHDND
L
L
(Figure 5)
Receiver
l
t
t
t
, t
Receiver Input to Output
Differential Receiver Skew
C
R
= 15pF, V = 1.5V, |V | = 1.5V,
50
2
65
9
ns
ns
PLHR PHLR
L
CM
AB
t and t < 4ns (Figure 6)
F
C = 15pF (Figure 6)
L
SKEWR
|t
– t
|
PHLR
PLHR
l
l
, t
Receiver Output Rise or Fall Time
Receiver Enable/Disable Time
C = 15pF (Figure 6)
L
3
12.5
40
ns
ns
RR FR
t
t
, t
, t
,
R = 1k, C = 15pF, DE = High (Figure 7)
L L
ZLR ZHR
LZR HZR
l
l
t
, t
Receiver Enable from Shutdown
Time to Shutdown
R = 1k, C = 15pF, DE = 0V, (Figure 7)
9
μs
ns
ZHSR ZLSR
SHDNR
L
L
t
R = 1k, C = 15pF, DE = 0V, (Figure 7)
100
L
L
Note ꢀ. Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2. All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to device ground unless
otherwise specified.
Note 3. Maximum data rate is guaranteed by other measured parameters
and is not tested directly.
Note 4. This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 150ºC when overtemperature protection is active.
Continuous operation above the specified maximum operating temperature
may result in device degradation or failure.
2862345f
6
LTC2862/LTC2863/
LTC2864/LTC2865
Tꢂ = 25°Cꢁ VCC = VL = 3.3Vꢁ unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs VCC
Supply Current vs Temperature
Supply Current vs Data Rate
10000
1000
100
10
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
20
16
12
8
250
200
150
100
50
I
R
L
= 54Ω
DIFF
CCTRS
C
= 100pF
I
CCTRS
I
CCTR
SLEW LIMITED
NON SLEW LIMITED
4
1
I
CCTR
I
CCS
0
0
0.1
3.0
4.0
V
4.5
(V)
5.0
5.5
3.5
30
35
45
50
55
60
40
–50
0
25 50 75 100 125 150
–25
SUPPLY CURRENT (mA)
CC
TEMPERATURE (°C)
2862345 G01
2862345 G02
2862345 G03
Driver Output Short-Circuit
Current vs Voltage
Driver Propagation Delay vs
Temperature
Driver Skew vs Temperature
200
150
100
50
1.5
1.0
120
35
1000
900
R
L
= 54Ω
R
L
= 54Ω
DIFF
= 100pF
DIFF
C
C
= 100pF
100
80
OUTPUT LOW
NON SLEW LIMITED
SLEW LIMITED
0.5
30
25
20
0.0
60
0
–50
–100
–150
–200
40
800
–0.5
–1.0
SLEW LIMITED
OUTPUT HIGH
20
NON SLEW LIMITED
–1.5
0
700
–60
–20
0
20
40
60
–40
–50
50
100
150
–50
50
100
150
0
0
OUTPUT VOLTAGE (V)
TEMPERATURE (°C)
TEMPERATURE (°C)
2862345 G06
2862345 G04
2862345 G05
Driver Output Low/High Voltage
vs Output Current
Driver Differential Output
Voltage vs Temperature
3.5
3.0
2.5
R
DIFF
= 100Ω
V
OH
2.3
2.1
1.9
1.7
2.5
2.0
1.5
1.0
0.5
0.0
R
DIFF
= 54Ω
V
OL
1.5
0
20
30
40
50
–50
50
100
150
10
0
OUTPUT CURRENT (mA)
TEMPERATURE (°C)
2862345 G07
2862345 G08
2862345f
7
LTC2862/LTC2863/
LTC2864/LTC2865
Tꢂ = 25°Cꢁ VCC = VL = 3.3Vꢁ unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
Receiver Output Voltage vs
Receiver Propagation Delay
vs Temperature
Output Current (Source and Sink)
Receiver Skew vs Temperature
6.0
5.0
4.0
3.0
2.0
1.0
0.0
58
56
54
52
50
48
46
–1.6
V
C
= 1.5V
V = 1.5V
AB
C = 15pF
L
V
= 5.5V
AB
= 15pF
L
L
–1.8
–2.0
–2.2
–2.4
–2.6
V
V
= 3.3V
L
= 2.25V
L
V
= 1.65V
4.0
L
V
L
= 1.65V TO 5.5V
2.0
0.0
6.0
8.0
–50
50
100
150
–50
50
100
150
0
0
OUTPUT CURRENT (ABSOLUTE VALUE) (mA)
TEMPERATURE (°C)
TEMPERATURE (°C)
2862345 G09
2862345 G10
2862345 G11
2862345f
8
LTC2862/LTC2863/
LTC2864/LTC2865
PIN FUNCTIONS
PIN NUMBER
PIN
NꢂME
LTC28±4
(DFN)
LTC28±4
(SO)
DESCRIPTION
LTC28±2
LTC28±3
LTC28±5
Receiver Output. If the receiver output is enabled (RE low) and A–B >
200mV, then RO will be high. If A–B < –200mV, then RO will be low. If the
receiver inputs are open, shorted, or terminated without a signal, RO will
be high.
RO
1
2
1
2
1
Receiver Enable. A low input enables the receiver. A high input forces the
receiver output into a high impedance state. If RE is high with DE low,
the part will enter a low power shutdown state.
RE
2
3
-
-
2
3
3
4
2
3
Driver Enable. A high input on DE enables the driver. A low input will
force the driver outputs into a high impedance state. If DE is low with RE
high, the part will enter a low power shutdown state.
DE
Driver Input. If the driver outputs are enabled (DE high), then a low on
DI forces the driver noninverting output Y low and inverting output Z
high. A high on DI, with the driver outputs enabled, forces the driver
noninverting output Y high and inverting output Z low.
DI
4
-
3
-
4
-
5
-
4
5
Logic Supply: 1.65V ≤ V ≤ V . Bypass with 0.1μF ceramic capacitor.
L
CC
V
L
Powers RO, RE, DE, DI and SLO interfaces on LTC2865 only.
GND
5
9
4
9
5
6, 7
-
6
Ground.
Exposed Pad
11
13
Connect the exposed pads on the DFN and MSOP packages to GND
Slow Mode Enable. A low input switches the transmitter to the slew rate
limited 250kbps max data rate mode. A high input supports 20Mbps.
SLO
Y
-
-
-
-
-
7
8
Noninverting Driver Output for LTC2863, LTC2864, LTC2865.
High-impedance when driver disabled or unpowered.
5
6
7
6
7
8
9
Inverting Driver Output for LTC2863, LTC2864, LTC2865.
High-impedance when driver disabled or unpowered.
Z
-
10
11
9
Inverting Receiver Input (and Inverting Driver Output for LTC2862).
Impedance is > 96kΩ in receive mode or unpowered.
B
7
10
Noninverting Receiver Input (and Noninverting Driver Output for
LTC2862). Impedance is > 96kΩ in receive mode or unpowered.
A
6
8
8
1
9
12
14
11
12
V
CC
10
Power Supply. 3V < V < 5.5V. Bypass with 0.1μF ceramic capacitor to
CC
GND.
NC
1, 8, 13
Unconnected Pins. Float or connect to GND.
FUNCTION TABLES
LTC28±2
LTC28±4ꢁ LTC28±5:
LOGIC INPUTS
MODE
ꢂꢁ B
RO
LOGIC INPUTS
MODE
ꢂꢁ B
Yꢁ Z
RO
DE
0
RE
0
DE
0
RE
0
Receive
Shutdown
Transceive
Transmit
R
R
Active
High-Z
Active
High-Z
Receive
Shutdown
Transceive
Transmit
R
R
R
R
High-Z
High-Z
Active
Active
Active
High-Z
Active
High-Z
IN
IN
IN
IN
IN
IN
0
1
0
1
1
0
Active
Active
1
0
1
1
1
1
2862345f
9
LTC2862/LTC2863/
LTC2864/LTC2865
BLOCK DIAGRAMS
LTC28±2
LTC28±3
V
CC
V
CC
A*
B*
RO
RO
RECEIVER
RECEIVER
A*
B*
RE
MODE CONTROL
DE
LOGIC
Z*
Y*
DI
DRIVER
DI
DRIVER
GND
2862345 BDb
*15kV ESD
GND
2862345 BDa
*15kV ESD
LTC28±4
LTC28±5
V
V
CC
CC
VL
A*
B*
A*
RO
RO
RECEIVER
RECEIVER
B*
RE
RE
MODE CONTROL
LOGIC
MODE CONTROL
LOGIC
DE
DE
Z*
Y*
Z*
Y*
DI
DI
DRIVER
DRIVER
SLO
GND
GND
2862345 BDc
2862345 BDd
*15kV ESD
*15kV ESD
2862345f
10
LTC2862/LTC2863/
LTC2864/LTC2865
TEST CIRCUITS
Y**
Y**
Z**
R
R
I
OSD
+
GND
OR
CC
GND
V
DI
DRIVER
DI
DRIVER
OD
OR
–
V
*
V
*
CC
+
+
–60V TO 60V
V
OC
–
–
Z**
2862345 FO2
2862345 FO1
*LTC2865 ONLY: SUBSTITUTE V FOR V
*LTC2865 ONLY: SUBSTITUTE V FOR V
L
CC
L
CC
**LTC2862 ONLY: SUBSTITUTE A, B FOR Y, Z
**LTC2862 ONLY: SUBSTITUTE A, B FOR Y, Z
Figure ꢀ. Driver DC Characteristics
Figure 2. Driver Output Short-Circuit Current
I
IN
A OR B
B OR A
RECEIVER
+
V
IN
–
2862345 FO3
V
I
IN
IN
R
IN
=
Figure 3. Receiver Input Current and Input Resistance
V
*
CC
Y**
Z**
DI
t
t
PHLD
PLHD
C
C
L
0V
DI
t
SKEWD
R
DIFF
DRIVER
1/2 V
O
V
Y, Z
O
L
2862345 FO4
90%
90%
(Y–Z)
0
0
10%
10%
t
RD
t
FD
**LTC2862 ONLY: SUBSTITUTE A, B FOR Y, Z
2862345 F04b
*LTC2865 ONLY: SUBSTITUTE V FOR V
L
CC
Figure 4. Driver Timing Measurement
2862345f
11
LTC2862/LTC2863/
LTC2864/LTC2865
TEST CIRCUITS
GND
OR
CC
R
R
L
L
Y**
V
DE
*
CC
1/2 V
V
CC
C
L
t
t
,
ZLD
ZLSD
0V
V
*
CC
t
LZD
DI
DRIVER
DE
OR
V
CC
GND
1/2 V
1/2 V
V
Y OR Z
Z OR Y
CC
O
V
CC
0.5V
0.5V
V
V
OL
OR
Z**
GND
C
OH
0V
L
CC
2862345 F05b
t
t
,
t
,
HZD
ZHD
t
ZHSD
SHDN
*LTC2865 ONLY: SUBSTITUTE V FOR V
L
CC
**LTC2862 ONLY: SUBSTITUTE A, B FOR Y, Z
2862345 FO5
*LTC2865 ONLY: SUBSTITUTE V FOR V
L
CC
Figure 5. Driver Enable and Disable Timing Measurements
t
= |t
– t
|
SKEWR
PLHR PHLR
V
AB
V
/2
/2
A–B
–V
0
AB
A
B
AB
RO
t
t
PLHR
PHLR
V
RECEIVER
CM
V
*
CC
90%
10%
90%
10%
C
V
O
1/2 V
*
CC
1/2 V
*
CC
RO
L
V
AB
0
2862345 F06b
t
t
FR
RR
2862345 FO6a
*LTC2865 ONLY: SUBSTITUTE V FOR V
L
CC
Figure ±. Receiver Propagation Delay Measurements
V
RE
*
CC
CC
t
t
,
ZLR
ZLSR
1/2 V *
CC
A
B
0V OR V
CC
R
0V
L
V
CC
RO
t
LZR
OR
RECEIVER
V
*
GND
C
1/2 V
1/2 V
*
*
V
OR 0V
V
O
RO
L
CC
CC
CC
0.5V
0.5V
V
OL
RE
DI = 0V OR V
*
CC
V
OH
RO
0V
2862345 F07b
2862345 FO7a
t
t
,
t
,
HZR
ZHR
t
ZHSR
SHDNR
*LTC2865 ONLY: SUBSTITUTE V FOR V
L
CC
*LTC2865 ONLY: SUBSTITUTE V FOR V
L
CC
Figure 7. Receiver Enable/Disable Time Measurements
2862345f
12
LTC2862/LTC2863/
LTC2864/LTC2865
APPLICATIONS INFORMATION
±±6V Fault Protection
±25V Extended Common Mode Range
To further increase the reliability of operation and extend
functionality in environments with high common mode
voltages due to electrical noise or local ground potential
differences due to ground loops, the LTC2862-LTC2865
devices feature an extended common mode operating
range of –25V to 25V. This extended common mode range
allows the LTC2862-LTC2865 devices to transmit and re-
ceive under conditions that would cause data errors and
possible device damage in competing products.
The LTC2862-LTC2865 devices answer application needs
for overvoltage fault-tolerant RS485/RS422 transceivers
operatingfrom3Vto5.5Vpowersupplies.Industrialinstal-
lations may encounter common mode voltages between
nodes far greater than the –7V to 12V range specified by
theRS485standards.StandardRS485transceiverscanbe
damagedbyvoltagesabovetheirtypicalabsolutemaximum
ratings of –8V to 12.5V. The limited overvoltage tolerance
of standard RS485 transceivers makes implementation
of effective external protection networks difficult without
interferingwithproperdatanetworkperformancewithinthe
–7Vto12VregionofRS485operation.Replacingstandard
RS485 transceivers with the rugged LTC2862-LTC2865
devices may eliminate field failures due to overvoltage
faults without using costly external protection devices.
±ꢀ5kV ESD Protection
The LTC2862 series devices feature exceptionally robust
ESD protection. The transceiver interface pins (A,B,Y,Z)
feature protection to 15kV HBM with respect to GND
without latchup or damage, during all modes of operation
orwhileunpowered.Alltheotherpinsareprotectedto 8kV
HBMtomakethisacomponentcapableofreliableoperation
under severe environmental conditions.
The 60V fault protection of the LTC2862 series is
achievedbyusingahigh-voltageBiCMOSintegratedcircuit
technology. The naturally high breakdown voltage of this
technology provides protection in powered-off and high-
impedanceconditions.Thedriveroutputsuseaprogressive
foldbackcurrentlimitdesigntoprotectagainstovervoltage
faults while still allowing high current output drive.
Driver
ThedriverprovidesfullRS485/RS422compatibility.When
enabled, if DI is high, Y–Z is positive for the full-duplex
devices (LTC2863-LTC2865) and A–B is positive for the
half-duplex device (LTC2862).
TheLTC2862seriesisprotectedfrom 60Vfaultsevenwith
GNDopen,orV openorgrounded.Additionalprecautions
CC
must be taken in the case of V present and GND open.
When the driver is disabled, both outputs are high-
impedance. For the full-duplex devices, the leakage on
the driver output pins is guaranteed to be less than 30μA
over the entire common mode range of –25V to 25V. On
the half-duplex LTC2862, the impedance is dominated by
CC
The LTC2862 series chip will protect itself from damage,
but the chip ground current may flow out through the ESD
diodes on the logic I/O pins and into associated circuitry.
The system designer should examine the susceptibility
of the associated circuitry to damage if the condition of a
the receiver input resistance, R .
IN
GND open fault with V present is anticipated.
CC
Driver Overvoltage and Overcurrent Protection
The high voltage rating of the LTC2862 series makes it
simple to extend the overvoltage protection to higher
levels using external protection components. Compared
to lower voltage RS485 transceivers, external protection
devices with higher breakdown voltages can be used, so
as not to interfere with data transmission in the presence
of large common mode voltages. The Typical Applications
section shows a protection network against faults to the
120VAC line voltage, while still maintaining the extended
25V common mode range on the signal lines.
The driver outputs are protected from short circuits to any
voltage within the Absolute Maximum range of –60V to
60V. The maximum current in a fault condition is 250mA.
Thedriverincludesaprogressivefoldbackcurrentlimiting
circuit that continuously reduces the driver current limit
with increasing output fault voltage. The fault current is
less than 15mA for fault voltages over 40V.
2862345f
13
LTC2862/LTC2863/
LTC2864/LTC2865
APPLICATIONS INFORMATION
All devices also feature thermal shutdown protection that
disablesthedriverandreceiverincaseofexcessivepower
dissipation (see Note 4).
The LTC2862 series uses fully symmetric positive and
negativereceiverthresholds(typically 75mV)tomaintain
gooddutycyclesymmetryatlowsignallevels. Thefailsafe
operationisperformedwithawindowcomparatortodeter-
mine when the differential input voltage falls between the
positive and negative thresholds. If this condition persists
for more than about 3μs the failsafe condition is asserted
and the RO pin is forced to the logic 1 state. This circuit
provides full failsafe operation with no negative impact to
receiver duty cycle symmetry, as shown in Figure 8. The
input signal in Figure 8 was obtained by driving a 10Mbps
RS485 signal through 1000 feet of cable, thereby attenu-
ating it to a 200mV signal with slow rise and fall times.
Good duty cycle symmetry is observed at RO despite the
degraded input signal.
Full Failsafe Operation
Whentheabsolutevalueofthedifferentialvoltagebetween
the A and B pins is greater than 200mV with the receiver
enabled, the state of RO will reflect the polarity of (A–B).
These parts have a failsafe feature that guarantees the
receiver output will be in a logic 1 state (the idle state)
when the inputs are shorted, left open, or terminated but
not driven, for more than about 3μs. The delay allows
normal data signals to transition through the threshold
regionwithoutbeinginterpretedasafailsafecondition.This
failsafe feature is guaranteed to work for inputs spanning
the entire common mode range of –25V to 25V.
Enhanced Receiver Noise Immunity
Most competing devices achieve the failsafe function by a
simple negative offset of the input threshold voltage. This
causes the receiver to interpret a zero differential voltage
as a logic 1 state. The disadvantage of this approach is
the input offset can introduce duty cycle asymmetry at the
receiver output that becomes increasingly worse with low
input signal levels and slow input edge rates.
Anadditionalbenefitofthefullysymmetricreceiverthresh-
olds is enhanced receiver noise immunity. The differential
inputsignalmustgoabovethepositivethresholdtoregister
asalogic1andgobelowthenegativethresholdtoregister
as a logic 0. This provides a hysteresis of 150mV (typical)
at the receiver inputs for any valid data signal. (An invalid
data condition such as a DC sweep of the receiver inputs
will produce a different observed hysteresis due to the
activation of the failsafe circuit.) Competing devices that
employ a negative offset of the input threshold voltage
generallyhaveamuchsmallerhysteresisandsubsequently
have lower receiver noise immunity.
Other competing devices use internal biasing resistors to
create a positive bias at the receiver inputs in the absence
of an external signal. This type of failsafe biasing is inef-
fective if the network lines are shorted, or if the network
is terminated but not driven by an active transmitter.
RS485 Network Biasing
RS485 networks are usually biased with a resistive divider
to generate a differential voltage of ≥200mV on the data
lines, which establishes a logic 1 state (the idle state)
when all the transmitters on the network are disabled. The
values of the biasing resistors are not fixed, but depend
on the number and type of transceivers on the line and
the number and value of terminating resistors. Therefore,
the values of the biasing resistors must be customized to
eachspecificnetworkinstallation,andmaychangeifnodes
are added to or removed from the network.
A, B
200mV/DIV
A–B
200mV/DIV
RO
1.6V/DIV
2862345 F08
40ns/DIV
Figure 8. Duty Cycle of Balanced Receiver with ±266mV
ꢀ6Mbps Input Signal
The internal failsafe feature of the LTC2862-LTC2865
eliminates the need for external network biasing resistors
2862345f
14
LTC2862/LTC2863/
LTC2864/LTC2865
APPLICATIONS INFORMATION
provided they are used in a network of transceivers with
similar internal failsafe features. The LTC2862-LTC2865
transceivers will operate correctly on biased, unbiased,
or under-biased networks.
mode voltage, positive current of up to 80mA may flow
from the transmitter pins back to V . If the system power
CC
supply or loading cannot sink this excess current, a 5.6V
1W 1N4734 Zener diode may be placed between V and
CC
GND to prevent an overvoltage condition on V .
CC
Hi-Z State
There are no power-up sequence restrictions on the
LTC2865.However,correctoperationisnotguaranteedfor
The receiver output is internally driven high (to V or V )
CC
L
orlow(toGND)withnoexternalpull-upneeded. Whenthe
receiver is disabled the RO pin becomes Hi-Z with leakage
of less than 5ꢀA for voltages within the supply range.
V > V .
L
CC
High Speed Considerations
Agroundplanelayoutwitha0.1μFbypasscapacitorplaced
High Receiver Input Resistance
lessthan7mmawayfromtheV pinisrecommended.The
CC
ThereceiverinputloadfromAorBtoGNDfortheLTC2863,
LTC2864, and LTC2865 is less than one-eighth unit load,
permitting a total of 256 receivers per system without
exceeding the RS485 receiver loading specification. All
grades of the LTC2862 and the H-grade devices of the
LTC2863, LTC2864, and LTC2865 have an input load less
than one-seventh unit load over the complete tempera-
ture range of –40°C to 125°C. The increased input load
specificationforthesedevicesisduetoincreasedjunction
leakage at high temperature and the transmitter circuitry
sharing the A and B pins on the LTC2862. The input load
of the receiver is unaffected by enabling/disabling the
receiver or by powering/unpowering the part.
PC board traces connected to signals A/B and Z/Y should
be symmetrical and as short as possible to maintain good
differential signal integrity. To minimize capacitive effects,
the differential signals should be separated by more than
the width of a trace and should not be routed on top of
each other if they are on different signal planes.
Care should be taken to route outputs away from any
sensitive inputs to reduce feedback effects that might
cause noise, jitter, or even oscillations. For example, in
the full-duplex devices, DI and A/B should not be routed
near the driver or receiver outputs.
The logic inputs have a typical hysteresis of 100mV to
provide noise immunity. Fast edges on the outputs can
causeglitchesinthegroundandpowersupplieswhichare
exacerbated by capacitive loading. If a logic input is held
Supply Current
The unloaded static supply currents in these devices are
low —typically 900ꢀA for non slew limited devices and
3.3mA for slew limited devices. In applications with resis-
tively terminated cables, the supply current is dominated
by the driver load. For example, when using two 120ꢁ
terminators with a differential driver output voltage of
2V, the DC load current is 33mA, which is sourced by the
positive voltage supply. Power supply current increases
with toggling data due to capacitive loading and this term
can increase significantly at high data rates. A plot of the
supply current vs data rate is shown in the Typical Per-
formance Characteristics of this data sheet.
near its threshold (typically V /2 or V /2), a noise glitch
CC
L
from a driver transition may exceed the hysteresis levels
on the logic and data input pins, causing an unintended
state change. This can be avoided by maintaining normal
logic levels on the pins and by slewing inputs faster than
1V/ꢀs. Good supply decoupling and proper driver termi-
nation also reduce glitches caused by driver transitions.
RS485 Cable Length vs Data Rate
Many factors contribute to the maximum cable length
that can be used for RS485 or RS422 communication,
including driver transition times, receiver threshold, duty
cycle distortion, cable properties and data rate. A typical
During fault conditions with a positive voltage larger than
the supply voltage applied to the transmitter pins, or dur-
ing transmitter operation with a high positive common
2862345f
15
LTC2862/LTC2863/
LTC2864/LTC2865
APPLICATIONS INFORMATION
curve of cable length versus maximum data rate is shown
in Figure 9. Various regions of this curve reflect different
performance limiting factors in data transmission.
It should be emphasized that the plot in Figure 9 shows
a typical relation between maximum data rate and cable
length. Results with the LTC2862 series will vary, de-
pending on cable properties such as conductor gauge,
characteristic impedance, insulation material, and solid
versus stranded conductors.
At frequencies below 100kbps, the maximum cable length
is determined by DC resistance in the cable. In this ex-
ample, a cable longer than 4000ft will attenuate the signal
at the far end to less than what can be reliably detected
by the receiver.
Low EMI 256kbps Data Rate
The LTC2862-2, LTC2863-2, and the LTC2864-2 feature
slew rate limited transmitters for low electromagnetic
interference (EMI) in sensitive applications. In addition,
the LTC2865 has a logic-selectable 250kbps transmit rate.
The slew rate limit circuit maintains consistent control of
transmitter slew rates across voltage and temperature to
ensure low EMI under all operating conditions. Figure 10
demonstrates the reduction in high frequency content
achieved by the 250kbps mode compared to the 20Mbps
mode.
10k
1k
LOW EMI
MODE
SLO = GND
100
RS485
STANDARD
SPEC
10
20
0
80
60
10k
100k
1M
10M
100M
DATA RATE (bps)
2862345 F09
NON SLEW LIMITED
–20
–40
40
Figure 9. Cable Length vs Data Rate (RS485/RS422 Standard
Shown in Vertical Solid Line)
20
–60
0
–80
–20
–40
–60
For data rates above 100kbps the capacitive and inductive
properties of the cable begin to dominate this relation-
ship. The attenuation of the cable is frequency and length
dependent, resulting in increased rise and fall times at
the far end of the cable. At high data rates or long cable
lengths, these transition times become a significant part
of the signal bit time. Jitter and intersymbol interference
aggravate this so that the time window for capturing valid
data at the receiver becomes impossibly small.
–100
–120
SLEW LIMITED
10
0
4
6
8
12
2
FREQUENCY (MHz)
2862345 F10
Figure ꢀ6. High Frequency EMI Reduction of Slew Limited
256kbps Mode Compared to Non Slew Limited 26Mbps Mode
The 250kbps mode has the added advantage of reducing
signal reflections in an unterminated network, and there-
by increasing the length of a network that can be used
without termination. Using the rule of thumb that the rise
time of the transmitter should be greater than four times
the one-way delay of the signal, networks of up to 140
feet can be driven without termination.
The boundary at 20Mbps in Figure 9 represents the guar-
anteedmaximumoperatingrateoftheLTC2862series.The
dashed vertical line at 10Mbps represents the specified
maximumdatarateintheRS485standard. Thisboundary
is not a limit, but reflects the maximum data rate that the
specification was written for.
2862345f
16
LTC2862/LTC2863/
LTC2864/LTC2865
TYPICAL APPLICATIONS
Bidirectional ±±6V 26Mbps Level Shifter/Isolator
C
LTC2863-1
LTC2863-1
R1
A
B
Y
Z
V
V
CC
CC
DI
RO
R2
DATA OUT 2
DATA IN 2
R1
C
C
R1
A
B
Y
Z
DI
RO
DATA IN 1
DATA OUT 1
R2
R1
C
GND
V
V
CC
CC
GND
ꢀ
ꢀ
60V
ꢀ
2862345 TA03
R1 = 100k 1%. PLACE R1 RESISTORS NEAR A AND B PINS.
R2 = 10k
C = 47pF, 5%, 50 WVDC. MAY BE OMITTED FOR DATA RATES ≤ 100kbps.
Failsafe O ꢂpplication (Idle State = Logic O)
5V
LTC2862
RO
V
I1
RO
CC
B
R
“A”
“B”
DE
DI/
A
DE
DI
D
GND
I2
2862345 TA04
2862345f
17
LTC2862/LTC2863/
LTC2864/LTC2865
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
S8 Package
8-Lead Plastic Small Outline (Narrow .ꢀ56 Inch)
(Reference LTC DWG # 05-08-1610)
.189 – .197
(4.801 – 5.004)
.045 ±.005
NOTE 3
.050 BSC
7
5
8
6
.245
MIN
.160 ±.005
.150 – .157
(3.810 – 3.988)
NOTE 3
.228 – .244
(5.791 – 6.197)
.030 ±.005
TYP
1
3
4
2
RECOMMENDED SOLDER PAD LAYOUT
.010 – .020
(0.254 – 0.508)
× 45°
.053 – .069
(1.346 – 1.752)
.004 – .010
(0.101 – 0.254)
.008 – .010
(0.203 – 0.254)
0°– 8° TYP
.016 – .050
(0.406 – 1.270)
.050
(1.270)
BSC
.014 – .019
(0.355 – 0.483)
TYP
NOTE:
INCHES
1. DIMENSIONS IN
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
SO8 0303
2862345f
18
LTC2862/LTC2863/
LTC2864/LTC2865
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
DD Package
8-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1698 Rev C)
0.70 p0.05
3.5 p0.05
2.10 p0.05 (2 SIDES)
1.65 p0.05
PACKAGE
OUTLINE
0.25 p 0.05
0.50
BSC
2.38 p0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
R = 0.125
0.40 p 0.10
TYP
5
8
3.00 p0.10
(4 SIDES)
1.65 p 0.10
(2 SIDES)
PIN 1
TOP MARK
(NOTE 6)
(DD8) DFN 0509 REV C
4
1
0.25 p 0.05
0.75 p0.05
0.200 REF
0.50 BSC
2.38 p0.10
BOTTOM VIEW—EXPOSED PAD
0.00 – 0.05
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE
2862345f
19
LTC2862/LTC2863/
LTC2864/LTC2865
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
S Package
ꢀ4-Lead Plastic Small Outline (Narrow .ꢀ56 Inch)
(Reference LTC DWG # 05-08-1610)
.337 – .344
.045 ±.005
(8.560 – 8.738)
.050 BSC
NOTE 3
13
12
11
10
8
14
N
9
N
1
.245
MIN
.160 ±.005
.150 – .157
(3.810 – 3.988)
NOTE 3
.228 – .244
(5.791 – 6.197)
2
3
N/2
N/2
7
.030 ±.005
TYP
RECOMMENDED SOLDER PAD LAYOUT
1
2
3
4
5
6
.010 – .020
(0.254 – 0.508)
× 45°
.053 – .069
(1.346 – 1.752)
.004 – .010
(0.101 – 0.254)
.008 – .010
(0.203 – 0.254)
0° – 8° TYP
.050
(1.270)
BSC
.014 – .019
(0.355 – 0.483)
TYP
.016 – .050
(0.406 – 1.270)
S14 0502
NOTE:
INCHES
(MILLIMETERS)
2. DRAWING NOT TO SCALE
1. DIMENSIONS IN
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
2862345f
20
LTC2862/LTC2863/
LTC2864/LTC2865
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
DD Package
ꢀ6-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699 Rev C)
0.70 p0.05
3.55 p0.05
2.15 p0.05 (2 SIDES)
1.65 p0.05
PACKAGE
OUTLINE
0.25 p 0.05
0.50
BSC
2.38 p0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.125
0.40 p 0.10
TYP
6
10
3.00 p0.10
(4 SIDES)
1.65 p 0.10
(2 SIDES)
PIN 1 NOTCH
R = 0.20 OR
PIN 1
TOP MARK
(SEE NOTE 6)
0.35 s 45o
CHAMFER
(DD) DFN REV C 0310
5
1
0.25 p 0.05
0.50 BSC
0.75 p0.05
0.200 REF
2.38 p0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
2862345f
21
LTC2862/LTC2863/
LTC2864/LTC2865
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
DE/UE Package
ꢀ2-Lead Plastic DFN (4mm × 3mm)
(Reference LTC DWG # 05-08-1695 Rev D)
0.70 p0.05
3.30 p0.05
3.60 p0.05
2.20 p0.05
1.70 p 0.05
PACKAGE OUTLINE
0.25 p 0.05
0.50 BSC
2.50 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
0.40 p 0.10
4.00 p0.10
(2 SIDES)
R = 0.115
TYP
7
12
R = 0.05
TYP
3.30 p0.10
3.00 p0.10
(2 SIDES)
1.70 p 0.10
PIN 1
TOP MARK
(NOTE 6)
PIN 1 NOTCH
R = 0.20 OR
0.35 s 45o
CHAMFER
(UE12/DE12) DFN 0806 REV D
6
1
0.25 p 0.05
0.75 p0.05
0.200 REF
0.50 BSC
2.50 REF
BOTTOM VIEW—EXPOSED PAD
0.00 – 0.05
NOTE:
1. DRAWING PROPOSED TO BE A VARIATION OF VERSION
(WGED) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
2862345f
22
LTC2862/LTC2863/
LTC2864/LTC2865
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
MSE Package
ꢀ2-Lead Plastic MSO ꢁ Exposed Die Pad
(Reference LTC DWG # 05-08-1666 Rev F)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 t 0.102
2.845 t 0.102
(.112 t .004)
0.889 t 0.127
(.035 t .005)
(.112 t .004)
1
6
0.35
REF
1.651 t 0.102
(.065 t .004)
5.23
(.206)
MIN
1.651 t 0.102
(.065 t .004)
3.20 – 3.45
(.126 – .136)
0.12 REF
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
NO MEꢂSUREMENT PURPOSE
DETAIL “B”
12
4.039 t 0.102
7
0.65
(.0256)
BSC
0.42 t 0.038
(.0165 t .0015)
(.159 t .004)
TYP
(NOTE 3)
0.406 t 0.076
RECOMMENDED SOLDER PAD LAYOUT
(.016 t .003)
12 11 10 9 8 7
REF
DETAIL “A”
0.254
(.010)
3.00 t 0.102
(.118 t .004)
(NOTE 4)
0s – 6s TYP
4.90 t 0.152
(.193 t .006)
GAUGE PLANE
0.53 t 0.152
(.021 t .006)
1
2 3 4 5 6
DETAIL “A”
0.86
(.034)
REF
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
0.22 – 0.38
(.009 – .015)
TYP
0.1016 t 0.0508
(.004 t .002)
MSOP (MSE12) 0911 REV F
0.650
(.0256)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.
2862345f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However,noresponsibilityisassumedforitsuse.LinearTechnologyCorporationmakesnorepresenta-
t ion th a t the in ter c onne c t ion of i t s cir cui t s a s de s cr ibed her ein w ill not in fr inge on ex is t ing p a ten t r igh t s.
23
LTC2862/LTC2863/
LTC2864/LTC2865
TYPICAL APPLICATION
RS485 Network with ꢀ26V ꢂC Line Fault Protection
RAYCHEM
POLYSWITCH
TRF600-150
LTC2862-2
RX
V
CC
×2
47Ω
RO
B
A
R 120Ω
t
RE
DE
0.1μF
250V
DI
TX
2862345 TA02
47Ω
CARBON
COMPOSITE
5W
1.5KE36CA
RELATED PARTS
PꢂRT NUMBER
LT1785, LT1791
LTC2850-53
DESCRIPTION
COMMENTS
60V Tolerant, 15kV ESD, 250kbps
60V Fault Protected RS485/RS422 Transceivers
3.3V 20Mbps 15kV RS485 Transceivers
Up to 256 Transceivers Per Bus
25kV ESD (LTC2854), 15kV ESD (LTC2855)
15kV ESD
LTC2854, LTC2855 3.3V 20Mbps RS485 Transceivers with Integrated Switchable Termination
LTC2856-1 Family 5V 20Mbps and Slew Rate Limited RS485 Transceivers
LTC2859, LTC2861 5V 20Mbps RS485 Transceivers with Integrated Switchable Termination
15kV ESD
LTC1535
LTM2881
Isolated RS485 Transceiver
Complete 3.3V Isolated RS485/RS422 ꢀModule® Transceiver + Power
2500V
Isolation, Requires External Transceiver
RMS
2500V
Isolation with Integrated Isolated DC/DC
RMS
Converter, 1W Power, Low EMI, 15kV ESD, 30kV/μs
Common Mode Transient Immunity
2862345f
LT 1211 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
24
●
●
© LINEAR TECHNOLOGY CORPORATION 2011
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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